Demonstration of electrical readout with threshold voltage variation

Ganesh Jayakumar, Maxime Legallais, Per-Erik Hellström, Mireille Mouis, Isabelle Pignot-Paintrand, Valérie Stambouli-Séné, Céline Ternon, Mikaël Östling

Wafer-scale HfO₂ encapsulated silicon nanowire field effect transistor for efficient label-free DNA hybridization detection in dry environment

Open access, Nanotechnology, Vol. 30, Article n° 184002, 12pages, doi:10.1088/1361-6528/aaffa5 (Feb. 2019)

Process for the fabrication of integrated NNFETs

M. Legallais, T. T. T. Nguyen, M. Mouis, B. Salem, E. Robin, P. Chenevier, C. Ternon

An innovative large scale integration of silicon nanowire-based field effect transistors

Solid State Electronics, Vol. 143, pp. 97-102, Special Issue, doi:10.1016/j.sse.2017.11.008 (May 2018).

Design, fabrication and test of an anologue mixed-signal ASIC, adapted to the detection of threshold voltage shifts of arrays of above IC integrated sensors, with ultra-low power consumption

To be published.

Optimization of nanowire density in the nanonet and of device geometry (source-drain distance and nanonet width)

 To be published.

Understanding of NNFET device operation, role of percolation effects in combination with threshold voltage dispersion in the nanonet

T. Cazimajou, M. Legallais, M. Mouis, C. Ternon, B. Salem, G. Ghibaudo

Electrical characteristics of silicon percolating nanonet-based Field Effect Transistors in the presence of dispersion

Solid State Electronics, Vol. 143, pp. 83-89, Special Issue, doi:10.1016/j.sse.2017.11.013 (May 2018).

Role of nanowire-nanowire junctions on NNFET performance

Thibauld Cazimajou, Thi Thu Thuy Nguyen, Maxime Legallais, Mireille Mouis, Céline Ternon, Gérard Ghibaudo

Low Temperature Electrical Characteristics of Si Nanonet Field-Effect Transistors

2019 Joint International EuroSOI Workshop and International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS), Grenoble, France (1-3 Apr. 2019)

Abstract in conference booklet pp. 132-133 (Apr. 2019), Full paper (4 pages) to be published in IEEE Conference Publications.

Development of the process steps allowing 3D integration of silicon NNFETs above CMOS

To be published

Development of a new functionalization protocol in gaseous phase, based on GOPS, which is more eco-friendly than the standard APTES based protocol, and respects the integrity of pre-patterned contacts

T. Demes-Causse, F. Morisot, M. Legallais, A. Calais, E. Pernot, I. Pignot-Paintrand, C. Ternon, V. Stambouli

DNA grafting on silicon nanonets using an eco-friendly functionalization process based on epoxy silane

Materials Today, accepted

Fabrication of chemiresistive layers based on ZnO nanonet, benchmarking of several passivation layers with resulting performance improvement

F. Morisot, V. H. Nguyen, C.Montemont, T. Maindron, D. Muñoz-Rojas, M. Mouis, M. Langlet, C. Ternon

Al₂O₃, Al doped ZnO and SnO₂ encapsulation of randomly oriented ZnO nanowire networks for high performance and stable electrical devices

Nanotechnology, accepted (Apr. 2019)

Fabrication of chemiresistors based on the integration of passivated nanonets on micro hotplates, characterization of the response to acetone.

F. Morisot, C. Zuliani, J. Luque, Z. Ali , M. Mouis, V.H Nguyen, D. Munoz-Rojas, O. Lourhzal, M. Texier, T. W. Cornelius, C. Ternon

ZnO based Nanowire Network for Gas Sensing Applications

Material Research Express, accepted (Apr. 2019)

Several other NN passivation layers tested. Benchmarking with microparticle based chemiresistors.More results to come.

Fabrication of 2 gas sensing demonstrators

One demonstrator compares the sensitivity of 2 different materials to acetone and ethanol, another one integrates the chemiresistor with its connection to a cell phone representing a close-to-market possible implementation.

Demonstration at EFECS 2018